C:/Users/duhem/Desktop/FoRTReSS/FoRTReSS/FoRTReSS/src/device.h

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#ifndef DEVICE_H
#define DEVICE_H

#include <string>
#include <iostream>
#include <map>
#include <vector>

#include "coordinates.h"
#include "cell.h"

using namespace std;

enum DeviceClass{UNDEF, Virtex5, Virtex6, Virtex7, Kintex7, Zynq7, CUSTOM};

const int NB_LUT_SLICE      = 4;
const int NB_FF_SLICE       = 8;
const int NB_LUT_CLB        = 8;
const int NB_FF_CLB         = 16;
const int NB_DRAM_CLB       = 256;
const int NB_SHIFT_REG_CLB  = 128;
const int NB_CLB_PER_COLUMN = 40;
const int NB_RAMB36_BRAM    = 8;
const int NB_DSP48_DSP      = 16;
const int NB_IOB_PER_COLUMN = 40;

const int NB_FRAMES_PER_CLB_COLUMN  = 36;
const int NB_FRAMES_PER_DSP_COLUMN  = 30;
const int NB_FRAMES_PER_BRAM_COLUMN = 158;
const int NB_FRAMES_PER_IOB_COLUMN = 30; // TODO
const int NB_WORDS_PER_FRAME        = 82;

/* Enumeration of the available resources for every FPGA */
const Cell SliceM_cell("SliceM", true, 40, 4, NB_FRAMES_PER_CLB_COLUMN * NB_CLB_PER_COLUMN / 2 * 4, true);
const Cell SliceL_cell("SliceL", true, 40, 1, NB_FRAMES_PER_CLB_COLUMN * NB_CLB_PER_COLUMN / 2 * 4, true);
const Cell Slice_cell("Slice", true, 40, 1, NB_FRAMES_PER_CLB_COLUMN * NB_CLB_PER_COLUMN / 2 * 4, true);
const Cell CLBm_cell("CLBm", true, 40, 4, NB_FRAMES_PER_CLB_COLUMN * NB_CLB_PER_COLUMN * 4, true);
const Cell CLBl_cell("CLBl", true, 40, 1, NB_FRAMES_PER_CLB_COLUMN * NB_CLB_PER_COLUMN * 4, true);
const Cell BRAM_cell("BRAM", true, 8, 24, NB_FRAMES_PER_BRAM_COLUMN * NB_RAMB36_BRAM * 4, false);
const Cell DSP_cell("DSP", true, 16, 24, NB_FRAMES_PER_DSP_COLUMN * NB_DSP48_DSP * 4, false);
const Cell IOB_cell("IOB", false, 40, 100, NB_FRAMES_PER_IOB_COLUMN * NB_IOB_PER_COLUMN * 4, false);
const Cell MMCM_cell("MMCM", false);
const Cell PCI_cell("PCI", false);
const Cell EMAC_cell("EMAC", false);
const Cell XXX_cell("XXX", false);
const Cell CLB_XXX_cell("CLB_XXX", false);
const Cell DSP_XXX_cell("DSP_XXX", false);
const Cell BRAM_XXX_cell("BRAM_XXX", false);
const Cell DCM_cell("DCM", false);

enum RBType{SliceM, SliceL, Slice, CLBm, CLBl, BRAM, DSP, IOB, MMCM, PCI, EMAC, XXX, CLB_XXX, DSP_XXX, BRAM_XXX, DCM};

const int NB_LINES_DEVICE   = 6;
const int NB_COLUMNS_DEVICE = 102;

const RBType fpga_device[NB_LINES_DEVICE][NB_COLUMNS_DEVICE] = {
{IOB,CLBm,CLBl,CLBm,CLBl,BRAM,CLBm,CLBm,DSP,CLBm,CLBm,CLBm,CLBm,DSP,CLBm,CLBm,BRAM,CLBm,CLBm,CLBm,CLBm,CLBm,CLBm,CLBm,CLBm,BRAM,CLBm,CLBm,DSP,CLBm,CLBm,CLBm,CLBm,DSP,CLBm,CLBm,BRAM,CLBm,CLBl,CLBm,CLBl,IOB,CLBm,CLBl,CLBm,CLBl,CLBl,CLBl,CLBl,CLBl,CLBl,CLBl,MMCM,CLBm,CLBl,CLBm,CLBl,IOB,CLBm,CLBl,CLBm,CLBl,BRAM,CLBm,CLBm,DSP,CLBm,CLBm,CLBm,CLBm,DSP,CLBm,CLBm,BRAM,CLBm,CLBm,CLBm,CLBm,CLBm,CLBm,CLBm,CLBm,BRAM,CLBm,CLBm,DSP,CLBm,CLBm,CLBm,CLBm,DSP,CLBm,CLBm,BRAM,CLBm,CLBl,CLBm,CLBl,CLBl,CLBm,CLBl,BRAM},
{IOB,CLBm,CLBl,CLBm,CLBl,BRAM,CLBm,CLBm,DSP,CLBm,CLBm,CLBm,CLBm,DSP,CLBm,CLBm,BRAM,CLBm,CLBm,CLBm,CLBm,CLBm,CLBm,CLBm,CLBm,BRAM,CLBm,CLBm,DSP,CLBm,CLBm,CLBm,CLBm,DSP,CLBm,CLBm,BRAM,CLBm,CLBl,CLBm,CLBl,IOB,CLBm,CLBl,CLBm,CLBl,CLBl,CLBl,CLBl,CLBl,CLBl,CLBl,MMCM,CLBm,CLBl,CLBm,CLBl,IOB,CLBm,CLBl,CLBm,CLBl,BRAM,CLBm,CLBm,DSP,CLBm,CLBm,CLBm,CLBm,DSP,CLBm,CLBm,BRAM,CLBm,CLBm,CLBm,CLBm,CLBm,CLBm,CLBm,CLBm,BRAM,CLBm,CLBm,DSP,CLBm,CLBm,CLBm,CLBm,DSP,CLBm,CLBm,BRAM,CLBm,CLBl,CLBm,CLBl,PCI,PCI,PCI,PCI},
{IOB,CLBm,CLBl,CLBm,CLBl,BRAM,CLBm,CLBm,DSP,CLBm,CLBm,CLBm,CLBm,DSP,CLBm,CLBm,BRAM,CLBm,CLBm,CLBm,CLBm,CLBm,CLBm,CLBm,CLBm,BRAM,CLBm,CLBm,DSP,CLBm,CLBm,CLBm,CLBm,DSP,CLBm,CLBm,BRAM,CLBm,CLBl,CLBm,CLBl,IOB,CLBm,CLBl,CLBm,CLBl,CLB_XXX,CLB_XXX,CLB_XXX,CLB_XXX,CLB_XXX,CLB_XXX,MMCM,CLBm,CLBl,CLBm,CLBl,IOB,CLBm,CLBl,CLBm,CLBl,BRAM,CLBm,CLBm,DSP,CLBm,CLBm,CLBm,CLBm,DSP,CLBm,CLBm,BRAM,CLBm,CLBm,CLBm,CLBm,CLBm,CLBm,CLBm,CLBm,BRAM,CLBm,CLBm,DSP,CLBm,CLBm,CLBm,CLBm,DSP,CLBm,CLBm,BRAM,CLBm,CLBl,CLBm,CLBl,CLBl,CLBm,CLBl,EMAC},
{IOB,CLBm,CLBl,CLBm,CLBl,BRAM,CLBm,CLBm,DSP,CLBm,CLBm,CLBm,CLBm,DSP,CLBm,CLBm,BRAM,CLBm,CLBm,CLBm,CLBm,CLBm,CLBm,CLBm,CLBm,BRAM,CLBm,CLBm,DSP,CLBm,CLBm,CLBm,CLBm,DSP,CLBm,CLBm,BRAM,CLBm,CLBl,CLBm,CLBl,IOB,CLBm,CLBl,CLBm,CLBl,CLB_XXX,CLB_XXX,CLB_XXX,CLB_XXX,CLB_XXX,CLB_XXX,MMCM,CLBm,CLBl,CLBm,CLBl,IOB,CLBm,CLBl,CLBm,CLBl,BRAM,CLBm,CLBm,DSP,CLBm,CLBm,CLBm,CLBm,DSP,CLBm,CLBm,BRAM,CLBm,CLBm,CLBm,CLBm,CLBm,CLBm,CLBm,CLBm,BRAM,CLBm,CLBm,DSP,CLBm,CLBm,CLBm,CLBm,DSP,CLBm,CLBm,BRAM,CLBm,CLBl,CLBm,CLBl,PCI,PCI,PCI,PCI},
{IOB,CLBm,CLBl,CLBm,CLBl,BRAM,CLBm,CLBm,DSP,CLBm,CLBm,CLBm,CLBm,DSP,CLBm,CLBm,BRAM,CLBm,CLBm,CLBm,CLBm,CLBm,CLBm,CLBm,CLBm,BRAM,CLBm,CLBm,DSP,CLBm,CLBm,CLBm,CLBm,DSP,CLBm,CLBm,BRAM,CLBm,CLBl,CLBm,CLBl,IOB,CLBm,CLBl,CLBm,CLBl,CLBl,CLBl,CLBl,CLBl,CLBl,CLBl,MMCM,CLBm,CLBl,CLBm,CLBl,IOB,CLBm,CLBl,CLBm,CLBl,BRAM,CLBm,CLBm,DSP,CLBm,CLBm,CLBm,CLBm,DSP,CLBm,CLBm,BRAM,CLBm,CLBm,CLBm,CLBm,CLBm,CLBm,CLBm,CLBm,BRAM,CLBm,CLBm,DSP,CLBm,CLBm,CLBm,CLBm,DSP,CLBm,CLBm,BRAM,CLBm,CLBl,CLBm,CLBl,CLBl,CLBm,CLBl,EMAC},
{IOB,CLBm,CLBl,CLBm,CLBl,BRAM,CLBm,CLBm,DSP,CLBm,CLBm,CLBm,CLBm,DSP,CLBm,CLBm,BRAM,CLBm,CLBm,CLBm,CLBm,CLBm,CLBm,CLBm,CLBm,BRAM,CLBm,CLBm,DSP,CLBm,CLBm,CLBm,CLBm,DSP,CLBm,CLBm,BRAM,CLBm,CLBl,CLBm,CLBl,IOB,CLBm,CLBl,CLBm,CLBl,CLBl,CLBl,CLBl,CLBl,CLBl,CLBl,MMCM,CLBm,CLBl,CLBm,CLBl,IOB,CLBm,CLBl,CLBm,CLBl,BRAM,CLBm,CLBm,DSP,CLBm,CLBm,CLBm,CLBm,DSP,CLBm,CLBm,BRAM,CLBm,CLBm,CLBm,CLBm,CLBm,CLBm,CLBm,CLBm,BRAM,CLBm,CLBm,DSP,CLBm,CLBm,CLBm,CLBm,DSP,CLBm,CLBm,BRAM,CLBm,CLBl,CLBm,CLBl,CLBl,CLBm,CLBl,BRAM}
};

const int x_coordinate_fpga_device[NB_LINES_DEVICE][NB_COLUMNS_DEVICE] = {
{0,0,2,4,6,0,8,10,0,12,14,16,18,1,20,22,1,24,26,28,30,32,34,36,38,2,40,42,2,44,46,48,50,3,52,54,3,56,58,60,62,1,64,66,68,70,72,74,76,78,80,82,0,84,86,88,90,2,92,94,96,98,4,100,102,4,104,106,108,110,5,112,114,5,116,118,120,122,124,126,128,130,6,132,134,6,136,138,140,142,7,144,146,7,148,150,152,154,156,158,160,8},
{0,0,2,4,6,0,8,10,0,12,14,16,18,1,20,22,1,24,26,28,30,32,34,36,38,2,40,42,2,44,46,48,50,3,52,54,3,56,58,60,62,1,64,66,68,70,72,74,76,78,80,82,0,84,86,88,90,2,92,94,96,98,4,100,102,4,104,106,108,110,5,112,114,5,116,118,120,122,124,126,128,130,6,132,134,6,136,138,140,142,7,144,146,7,148,150,152,154,0,1,2,3},
{0,0,2,4,6,0,8,10,0,12,14,16,18,1,20,22,1,24,26,28,30,32,34,36,38,2,40,42,2,44,46,48,50,3,52,54,3,56,58,60,62,1,64,66,68,70,36,74,76,78,80,82,0,84,86,88,90,2,92,94,96,98,4,100,102,4,104,106,108,110,5,112,114,5,116,118,120,122,124,126,128,130,6,132,134,6,136,138,140,142,7,144,146,7,148,150,152,154,156,158,160,0},
{0,0,2,4,6,0,8,10,0,12,14,16,18,1,20,22,1,24,26,28,30,32,34,36,38,2,40,42,2,44,46,48,50,3,52,54,3,56,58,60,62,1,64,66,68,70,36,74,76,78,80,82,0,84,86,88,90,2,92,94,96,98,4,100,102,4,104,106,108,110,5,112,114,5,116,118,120,122,124,126,128,130,6,132,134,6,136,138,140,142,7,144,146,7,148,150,152,154,0,1,2,3},
{0,0,2,4,6,0,8,10,0,12,14,16,18,1,20,22,1,24,26,28,30,32,34,36,38,2,40,42,2,44,46,48,50,3,52,54,3,56,58,60,62,1,64,66,68,70,72,74,76,78,80,82,0,84,86,88,90,2,92,94,96,98,4,100,102,4,104,106,108,110,5,112,114,5,116,118,120,122,124,126,128,130,6,132,134,6,136,138,140,142,7,144,146,7,148,150,152,154,156,158,160,0},
{0,0,2,4,6,0,8,10,0,12,14,16,18,1,20,22,1,24,26,28,30,32,34,36,38,2,40,42,2,44,46,48,50,3,52,54,3,56,58,60,62,1,64,66,68,70,72,74,76,78,80,82,0,84,86,88,90,2,92,94,96,98,4,100,102,4,104,106,108,110,5,112,114,5,116,118,120,122,124,126,128,130,6,132,134,6,136,138,140,142,7,144,146,7,148,150,152,154,156,158,160,8}
};


class Device {

private:
        /* Device identification */
        string deviceID;
        string package;
        string speedGrade;
        DeviceClass deviceClass;

        /* Device description */
        RBType **RBTable;
        int nb_lines;
        int nb_columns;

        /* Map to retrieve a Cell from a RBType */
        map<RBType, Cell> deviceCellMap;
        
        /* Location restrictions */
        vector<Coordinates> restrictedColumns;

        /* Ressources: TO BE REMOVED LATER */
        int nb_LUT_Slice;
        int nb_FF_Slice;
        int nb_LUT_CLB;
        int nb_FF_CLB;


public:
        Device() {

                deviceID = "xc6vlx240t";
                package = "ff1156";
                speedGrade = "-1";
                deviceClass = Virtex6;

                nb_lines = NB_LINES_DEVICE;
                nb_columns = NB_COLUMNS_DEVICE;
                RBTable = new RBType*[nb_lines];
                for(int i = 0; i < nb_lines; i++) RBTable[i] = (RBType *) fpga_device[i];

                /* Cell map init */
                deviceCellMap[SliceM] = SliceM_cell;
                deviceCellMap[SliceL] = SliceL_cell;
                deviceCellMap[Slice] = Slice_cell;
                deviceCellMap[CLBm] = CLBm_cell;
                deviceCellMap[CLBl] = CLBl_cell;
                deviceCellMap[BRAM] = BRAM_cell;
                deviceCellMap[DSP] = DSP_cell;
                deviceCellMap[IOB] = IOB_cell;
                deviceCellMap[MMCM] = MMCM_cell;
                deviceCellMap[PCI] = PCI_cell;
                deviceCellMap[EMAC] = EMAC_cell;
                deviceCellMap[XXX] = XXX_cell;
                deviceCellMap[CLB_XXX] = CLB_XXX_cell;
                deviceCellMap[DSP_XXX] = DSP_XXX_cell;
                deviceCellMap[BRAM_XXX] = BRAM_XXX_cell;
                deviceCellMap[DCM] = DCM_cell;

                /* Ressources: TO BE REMOVED LATER */
                nb_LUT_Slice = NB_LUT_SLICE;
                nb_FF_Slice = NB_FF_SLICE;
                nb_LUT_CLB = NB_LUT_CLB;
                nb_FF_CLB = NB_FF_CLB;

                // Prohibit bottom half of the FPGA
                //
                //
                // OLD
                //
                //
                /*for(int i = 0; i < NB_LINES_DEVICE / 2; i++) {
                        for(int j = 0; j < NB_COLUMNS_DEVICE; j++) restrictedColumns.push_back(Coordinates(i, j));
                }*/

                // Prohibit left half of the FPGA
                /*for(int i = 0; i < NB_LINES_DEVICE; i++) {
                        for(int j = 0; j < NB_COLUMNS_DEVICE / 2; j++) restrictedColumns.push_back(Coordinates(i, j));
                }*/
                //=================================================

                // Prohibit bottom half of the FPGA
                for(int i = 0; i < NB_LINES_DEVICE / 2; i++) {
                        for(int j = 0; j < NB_COLUMNS_DEVICE; j++) restrictedColumns.push_back(Coordinates(j, i));
                }

                // Prohibit left half of the FPGA
                for(int i = 0; i < NB_LINES_DEVICE; i++) {
                        for(int j = 0; j < NB_COLUMNS_DEVICE / 2; j++) restrictedColumns.push_back(Coordinates(j, i));
                }
        };

        ~Device() {
                delete[] RBTable;
        }

        /* Getters */
        int getNbLines(void);
        int getNbColumns(void);
        string getDeviceID(void);
        string getDevicePackage(void);
        string getDeviceSpeedGrade(void);
        DeviceClass getDeviceClass(void);

        /* Cost getter */
        int getResourceCost(RBType rbtype);
        int getResourceCount(RBType rbt);

        /* RB/Cell methods */
        RBType getRB(int line, int column) const;
        RBType getColumnRBType(int column);
        bool isRBReconfigurable(RBType rbt);
        Cell getCell(RBType);
        string getCellName(RBType);
        RBType getRBType(string) const;

        /* LOC constraints */
        bool isColumnUsable(int line, int column);

        /* UCF generation */
        int getPhysicalXCoordinate(int line, int column);

        /* Misc */
        void printDevice(void);


        /* TO BE REMOVED LATER: Techno-dependent stuff */
        int getNbLUTInSlice(void);
        int getNbFFInSlice(void);
        int getNbLUTInCLB(void);
        int getNbFFInCLB(void);

};

#endif