
/*******************************************************************
*
* CAUTION: This file is automatically generated by HSI.
* Version: 2022.2
* DO NOT EDIT.
*
* Copyright (C) 2010-2025 Xilinx, Inc. All Rights Reserved.
* SPDX-License-Identifier: MIT 

* 
* Description: Driver configuration
*
*******************************************************************/

#include "xparameters.h"
#include "xsdps.h"

/*
* The configuration table for devices
*/

XSdPs_Config XSdPs_ConfigTable[XPAR_XSDPS_NUM_INSTANCES] =
{
	{
		XPAR_PS7_SD_0_DEVICE_ID,
		XPAR_PS7_SD_0_BASEADDR,
		XPAR_PS7_SD_0_SDIO_CLK_FREQ_HZ,
		XPAR_PS7_SD_0_HAS_CD,
		XPAR_PS7_SD_0_HAS_WP,
		XPAR_PS7_SD_0_BUS_WIDTH,
		XPAR_PS7_SD_0_MIO_BANK,
		XPAR_PS7_SD_0_HAS_EMIO,
		XPAR_PS7_SD_0_SLOT_TYPE,
		XPAR_PS7_SD_0_IS_CACHE_COHERENT,
		XPAR_PS7_SD_0_CLK_50_SDR_ITAP_DLY,
		XPAR_PS7_SD_0_CLK_50_SDR_OTAP_DLY,
		XPAR_PS7_SD_0_CLK_50_DDR_ITAP_DLY,
		XPAR_PS7_SD_0_CLK_50_DDR_OTAP_DLY,
		XPAR_PS7_SD_0_CLK_100_SDR_OTAP_DLY,
		XPAR_PS7_SD_0_CLK_200_SDR_OTAP_DLY
	}
};


